PHELICITI - A new generation of chips in 3D

A chip that combines the best of two worlds: intelligent electronics meets fast photonics.The one-chip solutions developed by PHELICITI are scalable and can be produced cost effectively.

Short Description

Conventional microelectric circuits have significantly improved over the past few decades. Today, 100 million transistors can be housed on a single microprocessor the size of a finger nail - affordable for everyone thanks to silicon chip technology. However, with information increasing at such a rapid pace, conventional electronics is already facing its limits.

The solution to stay in the race for pace is photonics, a key enabling technology. It enables transporting massive capacities of ~100 Tb/s via fiber glass as thin as a strand of human hair, whether it’s between the processor cores in a supercomputer or between continents. This equates to an increase by a factor of 10,000 compared with conventional electronic data links!

High performance on small footprint

Linking intelligent electronics and fast photonics poses a big challenge, which can be translated into a simple question: How to realize this optical transmission in an economically viable way? The PHELICITI project has found a path to cost-efficient and scalable production of this new generation of integrated chip technology.

High-frequency microelectronics and silicon-based photonics can be integrated on top of each other by means of wafer stacking, i.e. three dimensionally, on a single chip. Moreover, vertical highfrequency connections between the layers allow for a bandwidth in the range of 10 GHz and beyond.

The result: fully fledged high-performance optoelectronic solutions that minimize the chip realestate thanks to 3D stacking. Another aim of the project is to establish a components library at photonic and electronic level. The technologic toolkit is designed to converge optoelectronic high-performance components. Thus, for example, a chip can be produced containing several transceiver units for telecommunications applications with high aggregated per-user data rates of up to 80 Gbit/s.

All elements are compatible with CMOS semiconductor manufacturing processes, meaning that high yield, silicon- based production can be used as it is also applied for microelectronics in the consumer sector. Other areas of application in the fields of sensor technology and life sciences are already in the pipeline.

Project Partners

Consortium Manager

AIT Austrian Institute of Technology GmbH

Other Consortium Partners

  • Lantiq GmbH
  • ams AG
  • Technical University Wien


Contact Address

Project Coordinator

Bernhard Schrenk